CAD & Engineering Infrastructure Lead

Role Overview

We are looking for a CAD & Engineering Infrastructure Lead to build and own the engineering platform behind Velaura's silicon development: the compute infrastructure, EDA ecosystem, integrated RTL-to-GDS release flow, and AI-assisted workflows that every design team depends on. This role owns flow release and qualification, design-flow CI/CD pipelines, multi-vendor EDA tool deployment, and EDA licensing, procurement, and vendor strategy; domain design methodology and flow content stay with the functional teams: RTL, verification, DFT, physical design, and packaging. The ideal candidate is hands-on setting up and maintaining integrated RTL-to-GDS flow environments, understands engineering compute infrastructure and license management at scale, and has a practical view of where AI creates measurable leverage in chip development. Above all, this is someone who measures success by how productive everyone else is.